1. Field of the Invention
The present invention relates to a data transmitting device, more particularly, to a data transmitting device capable of controlling amplitude of a differential signal stably, with removing an option pin and variable resistance to control amplitude of a low voltage differential signal, and a flat plate display using the same.
2. Discussion of the Related Art
A flat plate display capable of displaying images by using digital data may include a liquid crystal display (LCD) using liquid crystal, a plasma display panel (PDP) using discharge of inactive gas, an organic light emitting diode (OLED) display using organic light emitting diodes and the like.
Because of a trend of high resolution and large size required to display a high quality image, the amount of data transmission of such the flat plate panel display device has been increasing. As a result, the transmission frequency of data is getting high and the number of data transmission lines is increased such that electromagnetic interference (hereinafter, EMI) may occur a lot. The problem of EMI is generated in digital interface between a timing controller and a data driver of the flat plate display and it causes unstable driving of the device. To solve the problem of EMI and to reduce power consumption when data is transmitted at a high speed, the flat plate display uses data transmission methods that transmit data by using low voltage differential signals, wherein the data transmission methods includes an LVDS (Low Voltage Differential Signal) transmission method, a Mini-SVDS transmission method and the like. The interface between the timing controller and the data driver of the flat plate display typically uses the mini-LVDS data transmission method.
For the mini-LVDS data transmission, the timing controller includes an LVDS transmitter mounted in an output terminal and the data driver includes an LVDS receiver mounted in an input terminal. The LVDS transmitter converts data into a low voltage differential signal and it transmits the low voltage differential signal serially by using a couple of transmission lines. The LVDS receiver detects a voltage difference at termination resistance between the transmission couple of the lines and it restores data. The LVDS transmitter, the LVDS receiver and the couple of the transmission lines between them may form a current loop. An output voltage of the LVDS transmitter is determined by a reference voltage of a reference voltage generator. In other words, the output voltage of the LVDS transmitter may be controllable according to the control of the reference voltage. The timing controller IC (Integrated Circuit) of the related art integratedly having the LVDS transmitter mounted therein may include an option pin (RMLVDS) connected with the reference voltage generator and a variable resistance mounted on PCB (Printed Circuit Board) for a designer to control the reference voltage, that is, output voltage of the timing controller IC outside.
However, the variable resistance has to be mounted outside the timing controller IC additionally, only to cause work inconvenience and the option pin (RMLVDS) connected with the variable resistance has to be provided no matter what. Because of that, it is limited to reduce the number of pins and to reduce the production cost of the timing controller IC. Also, if the option pin (RMLVDS) is floated because of contact failure of the external variable resistance, it is impossible to generate the reference current and to generate to the output voltage accordingly. Because of that, the timing controller IC might be evaluated operation-failure.